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no-wait-state memory

См. также в других словарях:

  • wait state — noun (computing) The period of time that a microprocessor must wait while fetching data from a slower memory • • • Main Entry: ↑wait * * * wait state, a condition in which a computer processor must stop functioning between instructions: »A wait… …   Useful english dictionary

  • Wait state — A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond.As of late 2007, computer microprocessors run at very high speeds, while memory technology does not seem to be… …   Wikipedia

  • wait state —    A clock cycle during which no instructions are executed, because the processor is waiting for data from memory. Static RAM chips and paged mode RAM chips are becoming popular because they can store information without being constantly… …   Dictionary of networking

  • wait state — noun Any of several instances in which a computers processor cannot execute instructions (either for the entire computer, or just for a specific task) until an I/O operation completes, or until an interrupt is resolved With memory that slow, the… …   Wiktionary

  • Zero wait state — is a feature of a processor or computer architecture in which the processor does not have to wait to perform memory access. Non zero wait state describes the situation when a processor operates at a higher frequency than the memory, it has a wait …   Wikipedia

  • zero-wait-state computer —    A computer that can process information without processor wait states, which are clock cycles during which no instructions are executed because the processor is waiting for data from a device or from memory.    Static RAM chips and paged mode… …   Dictionary of networking

  • Memory for the future — refers to the ability to use memory to picture and plan future events. It is a subcategory of mental time travel which Suddendorf and Corballis described to be the process that allows people to imagine both past and potential future events.… …   Wikipedia

  • Memory disambiguation — is a set of techniques employed by high performance out of order execution microprocessors that execute memory access instructions (loads and stores) out of program order. The mechanisms for performing memory disambiguation, implemented using… …   Wikipedia

  • interleaved memory —    A method of speeding up access by dividing dynamic RAM (DRAM) into two (or more) separate banks.    DRAM requires that its contents be updated at least every thousandth of a second, and while this update is taking place, it cannot be read by… …   Dictionary of networking

  • Software transactional memory — In computer science, software transactional memory (STM) is a concurrency control mechanism analogous to database transactions for controlling access to shared memory in concurrent computing. It is an alternative to lock based synchronization. A… …   Wikipedia

  • Lock-free and wait-free algorithms — In contrast to algorithms that protect access to shared data with locks, lock free and wait free algorithms are specially designed to allow multiple threads to read and write shared data concurrently without corrupting it. Lock free refers to the …   Wikipedia

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